Efficient implementation of signed multipliers on FPGAs
[View]
1V V KRISHNA,2K HEMESH,3J YOGENDRA REDDY,4KOTLA DEVENDRANATH BABU,5MUDAVAT RAMESH NAIK,6MURAM VENKATA SISINDRA REDDY
This project presents a simple but effective strategy to implement signed binary multipliers on ay hardware with low power consumption
DOI: 30.0485/ijearst.06.01.3478
1V V KRISHNA,2K HEMESH,3J YOGENDRA REDDY,4KOTLA DEVENDRANATH BABU,5MUDAVAT RAMESH NAIK,6MURAM VENKATA SISINDRA REDDY
This project presents a simple but effective strategy to implement signed binary multipliers on ay hardware with low power consumption
DOI: 30.0485/ijearst.06.01.3478
Lightweight Direct Memory Access on FPGAmaterial
[View]
1 V V KRISHNA,2VESAPOGU KIRAN KUMAR RAJ,3HEMANADHA REDDDY MADARAM,4MSIDHARTHA REDDY,5T VENKATA SIVA,6SANA RAJASEKHAR
The project aims to design a soft core processor system with Advanced eXtensible Interface (AXI) processor bus which deals with different data capacities with 32, 64, 128, and 256 bits data width
DOI: 30.0485/ijearst.06.01.3478
1 V V KRISHNA,2VESAPOGU KIRAN KUMAR RAJ,3HEMANADHA REDDDY MADARAM,4MSIDHARTHA REDDY,5T VENKATA SIVA,6SANA RAJASEKHAR
The project aims to design a soft core processor system with Advanced eXtensible Interface (AXI) processor bus which deals with different data capacities with 32, 64, 128, and 256 bits data width
DOI: 30.0485/ijearst.06.01.3478
Design of a VLSI Router for the Faster_Data_Transmission_Using_Buffer
[View]
1V V KRISHNA, 2MALLAVARAPU NAGARAJU,3ANAPALA PADALA REDDY, 4SHAIK ISMAIL,5KOLATAM RAJESH KUMAR,6V SUBRAMANYAM
The router is a” Network Router” has a one input port from which the packet enters. It has five output ports where the packet is driven out.
DOI: 30.0485/ijearst.06.01.3478
1V V KRISHNA, 2MALLAVARAPU NAGARAJU,3ANAPALA PADALA REDDY, 4SHAIK ISMAIL,5KOLATAM RAJESH KUMAR,6V SUBRAMANYAM
The router is a” Network Router” has a one input port from which the packet enters. It has five output ports where the packet is driven out.
DOI: 30.0485/ijearst.06.01.3478
Design and analysis of 16-bit RISC processor
[View]
1M MADHAVI,2PADE ARUNA,3ITHADI SWAPNA,4ANDRA AKSHAYA,5MEDAPI ANJANILAKSHMI
This project describes a 16-bit RISC microprocessor core that has been designed for portable applications.
DOI: 30.0485/ijearst.06.01.3479
1M MADHAVI,2PADE ARUNA,3ITHADI SWAPNA,4ANDRA AKSHAYA,5MEDAPI ANJANILAKSHMI
This project describes a 16-bit RISC microprocessor core that has been designed for portable applications.
DOI: 30.0485/ijearst.06.01.3479
ECG Signal Filtering in FPGA
[View]
1P RENUKA,2NARUKURI NAGAMANI,3PASUPULETI VIJITHA,4SHAIK HUSSAINA,5THIRUMALASETTYBHARATHI
Electrocardiographic signal (ECG) is the most important electrophysiological signal used in the clinic for screening and diagnosis of many cardiac diseases.
DOI: 30.0485/ijearst.06.01.3478
1P RENUKA,2NARUKURI NAGAMANI,3PASUPULETI VIJITHA,4SHAIK HUSSAINA,5THIRUMALASETTYBHARATHI
Electrocardiographic signal (ECG) is the most important electrophysiological signal used in the clinic for screening and diagnosis of many cardiac diseases.
DOI: 30.0485/ijearst.06.01.3478
VLSI Implementation of Fast Addition Using Quaternary Signed Digit Number System
[View]
1P RENUKA,2NANGEDLA KALYANI,3BADUGU JUHI SRAVANTHI,4KOMMARA SRAVANI,5NBHAGYA LAKSHMI
High performance adders are essential since the speed of the digital processor depends heavily on the speed of the adders used is the system.
DOI: 30.0485/ijearst.06.01.3478
1P RENUKA,2NANGEDLA KALYANI,3BADUGU JUHI SRAVANTHI,4KOMMARA SRAVANI,5NBHAGYA LAKSHMI
High performance adders are essential since the speed of the digital processor depends heavily on the speed of the adders used is the system.
DOI: 30.0485/ijearst.06.01.3478
Pages [1]
This work is licensed under a Creative Commons Attribution 3.0 License.
© 2011 - 2026 International Journal of Engineering In Advanced Research Science and Technology
Managed By Indian Association for Reliability and Statistics
International Journal of Engineering In Advanced Research Science and Technology ISSN : 2040-7467 (Online)
All rights reserved withinfo.ijearst.co.in.
To make sure that you can receive messages from us, please add the 'ijearst.co.in' domain to your e-mail 'safe list'. If you do not receive e-mail in your 'inbox', check your 'bulk mail' or 'junk mail' folders.
For any Technical Support contact @info.ijearst.co.in